The invention relates to a circuit for the generation of combinatorial logic with multiplexers and inverters, wherein each output state is uniquely defined by a combination of at least the input variable.
Circuits for combinatorial logic generation are part of the basic digital technology circuits that are realizable, according to the state of the art, with two-stage OR-AND or AND-OR gate arrangements, or by means of multiplexers and inverters. A basic requirement for the design of such circuits is the use of a minimum of switching elements within reasonable expenditure of time. As a rule, either minterms, i.e. conjunctions, or maxterms, i.e. disjunctions, of all variables are employed to solve the respective problem. Either those minterms which effect a high logic level in their desired function or those maxterms whose desired function has a low logic level are used.
Boolean algebra, the McCluskey method, or the Karnaugh diagrams, described in the book by K. Steinbuch and W. Rupprecht: "Nachrichten-Technik", 2nd edition, 1973, Springer-Verlag, Berlin, Heidelberg, New York, offer possibilities to minimize the circuit complexity. Multiplexer circuits, which in today's technologies have special hardware realizations, are usually minimized through computer algorithms such as described in the paper by A. B. Ektare and D. P. Mital "Simple Algorithm for Logic Design Using Multiplexers" in "The Radio and Electronic Engineer", Vol. 50 (1980), No. 7, pages 363 to 366.
The known circuit complexity minimization methods are either cumbersome, time consuming, or restricted to a certain number of input variables. The Boolean algebra employs purely formal methods without system, and the McCluskey method, while being schematic, is complicated; Karnaugh diagrams are easy to handle only up to five input variables, and determining the best control variables in multiplexer circuits requires either computer time or much time to find the solution by hand.